• <code id="yw2ft"></code><del id="yw2ft"></del>

    1. <object id="yw2ft"><nobr id="yw2ft"><sub id="yw2ft"></sub></nobr></object>

        <center id="yw2ft"><small id="yw2ft"></small></center>

            <code id="yw2ft"><small id="yw2ft"></small></code>


            • SoC Design

              Demand to specification Specification to code FPGA to ASIC Algorithm hardening
            • IP Design

              IP customization IP selection IP integration
            • DFT Design

              ATPG Full-Scan MBIST
            • Physical Design

              GDS implementation Power analysis Timing analysis Rule check
            • Tapeout

              FullMask MPW Production service
            • Packaging

              Package design Chip packaging Probe card design CP/FT test
            • Turn-Key Service

              Specification to chip FPGA to chip Algorithm to chip RTL to chip
            Copyright ? 2022 Shanghai SMIT Xinxin Semiconductor, Co., LTD All rights reserved.   Shanghai ICP prepared No. 2021027597 Privacy PolicyRules Of UseSitemap

            CN EN